The present invention relates to a liquid crystal display device, and more particularly to a liquid crystal display device capable of a multi-gray scale display and used as a displaying means for a personal computer, a work station or the like.
Liquid crystal display devices are widely used as a display device for office automation equipment such as a personal computer. Liquid crystal display devices are divided roughly into a simple matrix type which forms pixels using intersections of intersecting stripe-shaped electrodes and an active matrix type which is provided with an active element such as a thin film transistor (TFT) at each pixel and switches the active element ON or OFF.
The active matrix type liquid crystal display device has a TFT-type liquid crystal panel, a scanning-signal line driver circuit (sometimes referred to as a gate driver) for supplying a scanning voltage to each of scanning signal lines (gate lines) of the liquid crystal panel, a video-signal line driver circuit (sometimes referred to as a drain driver) for supplying video signal voltages to video-signal lines (drain lines), a display control device for supplying various kinds of control signals and display data provided from a host computer such as a personal computer to the gate driver and the drain driver as display signals, and an internal power supply circuit.
FIG. 24 is a block diagram for explaining a rough configuration of a liquid crystal display device to which the present invention is applied. A liquid crystal panel 281 of the liquid crystal display device is an active-matrix type liquid crystal panel using thin-film transistors (a TFT LCD), and a plurality of drain drivers 282 and a plurality of gate drivers 283 are disposed along the top side of the liquid crystal panel 281.
The liquid crystal panel 281 comprises 1024xc3x97768 pixels, for example, each of which comprises three-color sub-pixels, red (R), green (G) and blue (B) sub-pixels.
A display control device 285 receives a display data (a video signal) in three colors of red (R), green (G) and blue (B), and control data including a clock signal, a display timing signal and a synchronizing signal from a host computer such as a personal computer via an interface connector 284.
The display control device 285 generates data in a display format of the liquid crystal panel based upon the control signal, and supplies them to the drain drivers 282 via data bus, and simultaneously with this, supplies timing signals such as a display start timing clock, a line clock and a pixel clock (a carry signal, CL1 and CL2) to the drain drivers 282.
An internal power supply circuit 286 generates reference voltages (V9 to V0) for generating gray scale display voltages and supplies them to the drain drivers 282, and supplies a scanning voltage (a gate voltage) to the gate drivers 283.
Each of the drain drivers 282 is allotted to a group comprised of a given number of video signal lines (drain lines), and outputs a carry signal to a succeeding one of the drain drivers 282 when the count reaches the above given number.
The drain drivers 282 each include a gray-scale generating circuit for generating a gray-scale voltage based upon a display data, and an amplifier for amplifying the generated gray-scale voltage and supplying a video signal voltage corresponding to the display data to a corresponding one of the drain lines.
In a liquid crystal display device of the TFT type, it is necessary to reverse the polarity of a video signal voltage applied to a drain line with respect to a voltage (hereinafter VCOM) applied to a counter electrode which opposes pixel electrodes from frame to frame, so as to prevent xe2x80x9cburningxe2x80x9d of the liquid crystal layer. For this polarity reversal, there are a VCOM AC driving method which reverses polarities of both two voltages applied to a pixel electrode and a counter electrode, respectively, and a dot-polarity inversion drive method which changes greatly a voltage applied to a pixel electrode with a fixed voltage applied to the counter electrode.
Such prior art techniques for the liquid crystal display devices are disclosed in Japanese Patent Application Laid-open No. Hei 9-281930 (laid-open on Oct. 31, 1997 and corresponding to U.S. Pat. No. 5,995,073 issued on Nov. 30, 1999), for example.
Recently, there is a tendency for the TFT active matrix type liquid crystal display device to be made larger in size of the liquid crystal panel, increase image resolution, improve image quality, and reduce power consumption. Further, it is desired that a useless space and the border areas around a display area are minimized to achieve aesthetic qualities of the display device.
It is essential that the cost of the liquid crystal display devices is brought down as their market matures, and there is a demand for reduction of the areas of chips of the drain drivers as well as the reduction of the border areas around a display area.
As liquid crystal panels used for a monitor spread as a large-screen display device superseding a cathode ray tube, there has been a demand for liquid crystal display devices capable of higher resolution and a larger number of gray scales. It is essential that the liquid crystal panels for a monitor can display 256 gray scales, while liquid crystal panels for notebook personal computers displayed 64 gray scales.
As for resolution also, the number of pixels in the liquid crystal monitor panel is changing from the XGA (extended video graphics array) specification to the SXGA (super XGA) specification and the UXGA (ultra XGA) specification and consequently, electrical loads on the liquid crystal panels tends to increase, and a time for writing in gray-scale voltages corresponding to a line in the liquid crystal panel is made shorter because a display speed of one picture is fixed. At the present time, the larger the screen size and the higher the resolution, the higher the gray-scale voltages, to retain the brightness equal to that by the conventional liquid crystal panel.
In the above situation, the increases in resolution, the number of gray-scales and operating voltages lead to the increases in IC chip size and consequently, the cost is increased.
A conventional decoder system of a so-called tournament type requires the same number of decoder circuits as that of gray scales, which is a great factor in the increase in chip size caused by the increase in the number of gray-scales, and this makes it difficult to reduce the border areas around a display area. The term tournament type comes from an analogy that exists between selection of one of many gray-scale voltages and a tournament in which many contestants compete for championship in series of elimination contests.
FIG. 25 is a circuit of a low-voltage circuit portion of a drain driver employing the conventional tournament type decoder system. The dot-polarity inversion method requires a high-voltage circuit portion of the drain driver for forming a pair with the low-voltage circuit portion. The high-voltage circuit portion is identical in configuration with the low-voltage circuit portion in FIG. 25, except that NMOS transistors serving as switching elements in FIG. 25 are interchanged with PMOS transistors, and its explanation is omitted.
In the low-voltage circuit portion in FIG. 25, three circuits CKTB, CKTC and CKTD identical with a circuit CKTA connected to a terminal A as shown in FIG. 25 are connected to terminals B, C and D, respectively and the circuits CKTA, CKTB, CKTC and CKTD are supplied with four groups of gray-scale voltages V000 to V063, gray-scale voltages V064 to V127, gray-scale voltages V128 to V191 and V192 to V255, respectively.
All the tournament type decoders CKTA, CKTB, CKTC and CKTD connected to the terminals A, B, C and D, respectively, are identical in configuration, and therefore the following explains only the tournament type decoder CKTA connected to the terminal A and supplied with the gray-scale voltages V000 to V063.
Input terminals D0N, D0P, D1N, D1P, . . . D6N and D6P of the tournament type decoder CKTA are supplied with a display data, and V00, V01, V02, . . . and V63 are 64 gray-scale voltages. Back gates of the NMOS transistors are connected to ground (GND). An output terminal YB outputs drain line drive voltages of negative polarity (drain line drive voltages of a low-voltage side).
FIG. 26 is a schematic of the overall configuration of the tournament type decoder. V00 to V255 are gray-scale voltages, and each of the decoders 0 to 255 comprises eight MOS transistors denoted by ◯ serving as switching elements. Vn denotes an output.
This configuration requires 256 decoders each formed by eight MOS transistors connected in series, and requires 256 wiring lines (gray-scale voltage lines) for supplying the gray-scale voltages to the 256 decoders from a voltage divider (a resistive-ladder network) of a gray-scale voltage generator circuit.
An increase in electrical load of the liquid crystal panel caused by increasing resolution and the screen size of the liquid crystal panel causes insufficient writing-in of gray-scale voltages and degrades the quality of a display image.
FIG. 27 is an illustration of a relationship between gray-scale voltages and writing-in time. Here the writing-in time is plotted as abscissas and the gray-scale voltages as ordinates. The broken curve shows a relationship between gray-scale voltages and writing-in time for a conventional SVGA (Super-Video Graphics Array) 64-gray-scale liquid crystal panel of a nominal screen size of about 14 inches, for example, and the full curve shows a relationship between gray-scale voltages and writing-in time for a large-screen, high-resolution XGA or SXGA 256-gray-scale liquid crystal panel of a nominal screen size of about 18 inches or more, for example.
If the liquid crystal panel is configured so as to increase the resolution, an electrical load of the liquid crystal panel is increased and consequently, time constant of writing-in voltages is increased. Further, the period of one picture frame is fixed even if the number of pixels is increased and consequently, the time usable for writing-in of gray-scale voltages is reduced relatively, and if the number of bits representing display data is increased by increasing the number of gray-scale steps, resistances of the decoders are increased and time constant of writing-in voltages is increased, resulting in insufficient writing-in of gray-scale voltages.
It is an object of the present invention to provide a high-resolution multi-gray scale liquid crystal display device having reduced border areas around a display area by reducing the number of decoders and the number of wiring lines so as to suppress an increase in chip size.
It is another object of the present invention to provide a liquid crystal display device capable of displaying a high-quality image by suppressing an increase in on-resistances of decoders.
The above objects are realized by generating two gray-scale voltage by using an output amplifier (sometimes referred to merely as an amplifier), and are realized by reducing delay of gray-scale voltages within a chip suppressing an increase in on-resistances of decoders caused by an increase of gray-scale steps.
The following are representative configurations of the present invention for achieving the above objects:
To accomplish the above objects, in accordance with an embodiment of the present invention, there is provided a liquid crystal display device including a liquid crystal panel having a plurality of pixels and a video signal line driver circuit for supplying a video signal voltage to each of the plurality of pixels via a corresponding one of a plurality of video lines in accordance with a display data comprising P bits, the video signal line driver circuit comprising: a power supply circuit for supplying Q different gray-scale voltages; a plurality of selector circuits corresponding to the plurality of video lines, each of the plurality of selector circuits for outputting one of first and second pairs of voltages in accordance with the display data, the first pair comprising two voltages equal to a same one selected from among the Q different gray-scale voltages, the second pair comprising two different voltages selected from among the Q different gray-scale voltages; and a plurality of amplifiers corresponding to the plurality of video lines, each of the plurality of amplifiers for outputting the video signal voltage to a corresponding one of the plurality of video lines based upon one of the first and second pairs of voltages or a voltage intermediate between the second pair of voltages and produced from the second pair of voltages in the amplifiers.
To accomplish the above objects, in accordance with another embodiment of the present invention, there is provided a liquid crystal display device including a liquid crystal panel having a plurality of pixels and a video signal line driver circuit for supplying a video signal voltage to each of the plurality of pixels via a corresponding one of a plurality of video lines in accordance with a display data comprising P bits, the video signal line driver circuit comprising: a power supply. circuit for supplying Q different gray-scale voltages; a plurality of selector circuits corresponding to the plurality: of video lines, each of the plurality of selector circuits for outputting a plurality of voltages selected from among the Q different gray-scale voltages in accordance with the display data; and a plurality of amplifiers corresponding to the plurality of video lines, each of the plurality of amplifiers for outputting the video signal voltage to a corresponding one of the plurality of video lines based upon one of the plurality of voltages or a voltage different from the plurality of voltages and produced from the plurality of voltages in the amplifiers, in accordance with the display data.
To accomplish the above objects, in accordance with another embodiment of the present invention, there is provided a liquid crystal display device including a liquid crystal panel having a plurality of pixels and a video signal line driver circuit for supplying a video signal voltage to each of the plurality of pixels via a corresponding one of a plurality of video lines in accordance with a display data comprising P bits, the video signal line driver circuit comprising: a power supply circuit for supplying Q different gray-scale voltages; a plurality of selector circuits corresponding to the plurality of video lines, each of the plurality of selector circuits for outputting one of first and second pairs of voltages in accordance with the display data, the first pair comprising two voltages equal to a same one selected from among the Q different gray-scale voltages, the second pair comprising two different voltages selected from among the Q different gray-scale voltages; and a plurality of amplifiers corresponding to the plurality of video lines, each of the plurality of amplifiers for outputting the video signal voltage to a corresponding one of the plurality of video lines by current-amplifying the first pair of voltages or current-amplifying a voltage intermediate between the second pair of voltages and produced from the second pair of voltages in the amplifiers, in accordance with the display data.
With the above configurations, output voltages of M gray-scale steps are generated by using (M+1)/2 input voltages if the number M is odd, or using (M/2+1) input voltages if the number M is even, and consequently, the circuit size of the drain drivers is reduced so as to reduce the area of the chip, output voltages matched with xcex3 characteristics of the liquid crystal are obtained, the cost of the TFT liquid crystal panel is brought down and the border areas around the display area in the liquid crystal display device are reduced.
The present invention is not limited to the above configurations or embodiments described subsequently, but various changes and modifications can be made to those without departing from the nature and spirit of the invention.